home
***
CD-ROM
|
disk
|
FTP
|
other
***
search
/
Best of Shareware
/
Best of PC Windows Shareware 1.0 - Wayzata Technology (7111) (1993).iso
/
mac
/
ZIPPED
/
DOS
/
CAD_CAM
/
PADSLOG.ZIP
/
MINC.DOC
< prev
next >
Wrap
Text File
|
1992-01-15
|
7KB
|
234 lines
Dear PADS User:
PADS Software, Inc. is proud to announce the migration
between PADS-LOGIC and the MINC PLDesign Package.
The migration includes a 60 part library and the capability
of Futurenet enhanced output formatted files which will be
adjusted to feed into MINC PLDesign.
Customers who are interested can receive further information
from our Bulletin Board service or from MINC Incorporated.
The file MINC.EXE will be available on our BBS which will
include instructions on how to migrate, as well as, include
an expandable 60 part library. Customers who have received
the MINC Library via our Bulletin Board Service should
follow the instructions defined below beginning with item
#1.
Customers who have received PADS-LOGIC Version 2.X should
note the MINC Library files have already been included in
the \PADS\LIB Directory, and are labeled: MINC.PT, MINC.PD,
MINC.LD, and MINC.LN. To utilize the MINC Library,
customers should automatically move to item #4 (defined
below) and follow the instructions from there on in.
NOTE: Customer must have PADS-LOGIC Version 2.X in order to
create a compatible netlist which can be converted into the
proper MINC format.
MINC LIBRARY INSTALLATION
To install the necessary files, simply follow the steps
outlined below:
1.) Copy MINC.EXE into your \PADS\LOGFIL Directory.
2.) From the \PADS\LOGFIL Directory, type "MINC" (this will
unpack the MINC file into many files).
3.) Copy the MINC.* files from the \PADS\LOGFIL to the
\PADS\LIB Directory.
4.) Go into PADS-LOGIC Version 2.X, under the SETUP
(F8)\LIBPATH (F4) menu, and add a new library called MINC.
5.) You should now be able to call parts from the MINC
library and use them on your schematic.
6.) At this point, you may remove any of the MINC related
files from the \PADS\LOGFIL directory that are not being
used.
NOTE: If the schematic you are generating is going to be
ported over to MINC, make sure that all your parts are taken
out of the MINC library only. To insure this, make sure
your MINC library is the first library PADS-LOGIC searches.
CREATING MINC PARTS IN PADS-LOGIC
To insure your parts are set up for MINC translation, you
must create them in the following manner:
1.) Make sure you create, save, and use only the parts which
will be converted to MINC, in the MINC library, and are
identified in the MINC PLDesigner manual.
2.) Make sure the MINC library is the first sequence number
identified in the SETUP (F8)\LIBPATH (F4) menu.
3.) Make sure the PKGTYP.DAT file contains the "I$ ASC"
statement and is located in the \PADS Directory.
4.) When you create the parts, make sure the "family"
category contained in the electrical window is set to ASC.
5.) After all these items are completed, you may create your
part types and decals per the instructions in the PADS-LOGIC
and MINC PLDesigner manuals.
INSTRUCTIONS FOR OUTPUTTING A FILE TO THE MINC PLDESIGN
PACKAGE
1.) Make sure all components in the schematic are created
based on the MINC requirements and come from the special
MINC library (60 parts included in basic library).
2.) Select IN/OUT (F1), REPORTS (F7), NETLIST (F1), and
FUTNETENH.
3.) Enter name to save as the following:
<DRIVE><DIRECTORY><FILENAME><EXTENSION>
Example: D:\MINC\TOM.NV4
NOTE 1: If the file is saved without the NV4 extension it
will have a .NET extension. The .NET extension must be
renamed to .NV4 for proper MINC compiling. The file must
then be copied from the \PADS\LOGFIL directory to the \MINC
directory, if not previously directed.
NOTE 2: The name of the NV4 file cannot contain a dash.
EXAMPLE: H-8.NV4 is incorrect and will not allow the
PLDesigner to compile.
EXAMPLE: H8.NV4 is correct and will allow the PLDesigner to
compile.
4.) Enter in the # "4" for MFG 1 attribute.
5.) Enter the # "5" for MFG 2 attribute.
6.) Enter in the # "1" for PART DESC attribute.
INSTRUCTIONS FOR CONVERTING A PADS .NV4 FILE TO A PLDESIGNER
FORMAT.
1.) Setup PLDesigner to operate with Futurenet.
2.) Type the following to produce a .DRW file for compiling:
PLSCH_<NAME>_FUTURE
NOTE 1: "_" is a space between characters.
NOTE 2: <CR> refers to the "enter" key on most keyboards.
NOTE 3: Do not type the .NV4 extension after the name. The
PLDesigner program assumes that the filename has the .NV4
extension.
NOTE 4: The expected output and messages of this program are
listed later in this document file.
3.) Enter: "PLD" <CR>.
NOTE: The PLDesigner program will start.
4.) Select "Current File" with the keyboard or mouse and hit
<CR>.
5.) Enter the file name in the blue box and hit <CR>.
6.) Use the mouse or keyboard to select "Compile Design" and
hit <CR>.
NOTE: The following are the programs which will run using
PLDesigner, and the expected output from these programs.
a.) The message "BAD COMMAND OR FILE NAME" will appear
three times as the program attempts to access
Futurenet. These errors do not affect the compiling of
the PADS schematics.
b.) The PLSCHematic program will run again and will
produce the .DRW output as previously encountered. The
program will read:
"Initialize 11"
"Ports
"Instances"
"NETS"
Any output ports not connected will give warning
messages, but this will not affect compiling. Error
messages will be given at this point and these will not
permit a .DRW file to be produced for compiling.
After the warning messages two other non-error messages
will appear.
"Processing"
"Writing"
After "Processing" and "Writing", the PLSCHematic
process is complete.
c.) The second program "PLCompile" will give the
following messages.
"Reading"
"No error detected, translation complete" - once
compiling is accomplished.
If errors exist, then the program will give error
messages after "Reading" appears. The error messages
will pertain to the .DRW file and the faulty line of
the .DRW file will be listed by the compiler in
parenthesis.
d.) The third program to run is PLReduce. PLReduce
will list all the schematic outputs.
e.) The fourth program to run is PLSimulate and the
following messages will appear:
"....No input date...."
"Print............"
f.) The last program to run is PLDocument. One message
should be given.
"Print............"
7.) Once the compiling process is complete with no errors,
then the schematic should be processed correctly.
SITUATIONS WHICH WILL CAUSE ERRORS DURING THE COMPILING
PROCESS
1.) NET names should not end or begin with brackets "[]" or
backslash "\".
2.) Input and Output ports must have net names (not assigned
net numbers by PADS-LOGIC). Components may have PADS-LOGIC
assigned net numbers if they are not connected to ports.
3.) Net names cannot have more than one occurrence on a
schematic unless the nets are physically connected together.
4.) Components must not have more than one occurrence of a
pin name (per part) or the Futurenet output may assign the
same pin twice in the netlist.